Error correction circuits structures based on Boolean complement with calculation checking by code with summation of weighted transitions from bit to bit

Methods for introducing modular redundancy are widely used in fault-tolerant digital devices and systems synthesis. Such methods involve the use of the original device's exact copies (analogues) and error correction circuits. There are structures based on the introduction of triple and double modular redundancy widespread and knowing. Research shows that fault-tolerant structures can be obtained without using modular redundancy techniques. At the same time, it is possible to achieve a decrease in the introduced hardware redundancy to endow the device with the property of fault tolerance concerning methods based on the introduction of modular redundancy. An effective technical solution is the use of the logical complement principle with the built-in control circuits organization, the diagnostics object, or a Boolean complement block in the fixing circuit of distorted signals. When organizing built-in control circuits using the Boolean complement method, it is possible to consider the structural features of the diagnosed object itself, and this makes it possible to reduce the structural redundancy relative to known methods. The article proposes standard structures of fault-tolerant devices based on the weight-transition sum code from bit to bit. Such a code is obtained by dividing the bits of the data vector into k = m - 1 pairs, starting with the least significant bit (pairs f1,/2), f2,/3), (fm-1, fm-2), (fm, fm-1)), are formed), assigning the pairs of weight coefficients from a series of increasing powers of the number 2 (2⁰, 2¹, 2^m-3, 2^m-2), the subsequent addition of the weighting coefficients values of the digits pairs according to the formula W = z: ./ W-.i+iq/.i+i- where q_{i i+i} = f © f_M is the activating function the transition between the digits fi and fi+1. This code is designated as a Tm-code. It has k = m - 1 check bit, each of which is implemented as a convolution modulo M = 2 bits in the corresponding pair. In previous author research, it was proved that this code detects any errors in data vectors, except for errors with maximum multiplicity d = m. The noted property can be effectively used in the built-in control circuits synthesis, if exclude the diagnostic object faults influence immediately all its outputs, any combination of distortions can be detected. The use of the Tm-code in the built-in control circuits synthesis gives a decrease in the introduced structural redundancy with the duplication method use. This feature is proposed to be used in the synthesis of fault-tolerant devices. The paper proposes four typical fault-tolerant structures based on the use of the Tm-code. The 1st two structures are based on the use of the duplication with computations control principle by one of the devices. In the first case, the calculations at the outputs of the main block are controlled. In the second, the calculations at the outputs of the additional block are controlled. The differences between the structures are in the method of signal correction when fixing computational errors. The other two structures are based on the use of only one source device and the implementation of a special block for fixing distorted signals using the Boolean complement method. In the first case, the calculations by the main unit are controlled by the Tm-code, and the fixation of distortions is performed in fixing the distorted signals. In the second case, the calculations are controlled in the block for fixing the distorted signals. The use of Boolean complement makes it possible to synthesize many variants of blocks for fixing distorted signals, which makes it possible to choose the variant that gives the least introduced structural redundancy. The block for fixing the distorted bits includes a Boolean complement block and a block for calculating correction functions. In the second case, this block also includes a built-in Tm-code control circuit, which controls the calculations at the control logic block outputs. The task of synthesizing a block for fixing distorted bits is to synthesize a built-in control circuit, a block for calculating correction functions, and a Boolean complement block. The first two, as shown in the article, have a standard implementation. For the Boolean complement block synthesis, the article proposes two algorithms. An example of the synthesis of all four structures is given. The theoretical results are complemented by the results obtained in experiments with combinational benchmarks LG'93 and MCNC Benchmarks. The results show the effectiveness of the proposed structures in comparison with the known ones. The use of Boolean complement and code methods for the self-checking and fault-tolerant digital devices and systems synthesis makes it possible to expand the number of methods for their implementation and to minimize the structural redundancy indicators. The results obtained in the article should be taken into account in practice when choosing an approach to the synthesis of fault-tolerant digital devices and systems.

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