Implementation of the sigmoid activation function using the reconfigurable computing environments

In this paper, we consider options for implementation of the sigmoid activation function for hardware accelerators of neural networks implemented entirely on reconfigurable computing environments (RCE). The advantages of using such accelerators in low-power intelligent systems are shown. Accelerator models based on distributed piecewise linear approximation of the sigmoid are proposed. The time simulation results of the developed Verilog-models are presented. Contribution of the authors: the authors contributed equally to this article. The authors declare no conflicts of interests.

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