Test generation for single and multiple stuck-at faults of a combination cir-cuit designed by covering shared free BDD with CLBs
A combinational circuit is derived with covering the proper Shared Free BDD by CLBs in the frame of FPGA technology. Single stuck-at faults at the CLBs poles and multiple faults constituted from such single stuck-at faults are considered. It is shown that the test patterns as for the certain single stuck-at faults so for multiple stuck-at faults there not always exist. The test pattern for a multiple stuck-at fault is the special test pattern for the special single stuck-at fault forming the multiple one. Test for all multiple stuck-at faults is derived from any test for all single stuck-at faults. Multiple fault test is a test of high quality. It can be used for the combinational part of a sequential circuit in BIST techniques.
Keywords
ROBDD ,
Shared ROBDD ,
Free BDD ,
комбинационная схема ,
одиночные константные неисправности ,
кратные константные неисправности ,
проверяющий тест ,
Shared Free BDDs ,
Single Stuck-at Faults ,
Multiple Stuck-at Faults ,
test design Authors
Nikolaeva E. | Tomsk State University | nikolaeve-ea@yandex.ru |
Всего: 1
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