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Selection of the flip-flops for partial enhanced scan techniques
Structural scan based delay testing is used to detect delay faults. Because of thearchitectural limitations not each test pair v1, v2 can be applied by scan delay testing.That declines test coverage. Partial enhanced scan approach based on selectionof flip-flops was suggested to permit using arbitrary test pairs v1, v2. Theproblem of selection of flip-flops may be solved with applying estimations ofcontrollability and observability of the state variables corresponding to the flipflops.Calculation of controllability and observability estimations is based on 2-length combinational equivalent analyses and PDF testing.
Keywords
неисправность задержки пути,
робастно тестируемый путь,
эквивалентная нормальная форма (ЭНФ),
Path delay fault (PDF),
robust PDF,
equivalent normal form (ENF)Authors
Matrosova Anzhela Yu. | National Research Tomsk State University | mau11@yandex.ru |
Melnikov Alexey V. | National Research Tomsk State University | alexey.ernest@gmail.com |
Mukhamedov Ruslan V. | National Research Tomsk State University | predictor@yandex.ru |
Ostanin Sergey A. | National Research Tomsk State University | ostanin@mail.tsu.ru |
Singh Virendra | Indian Institute of Technology Bombay | virendra@computer.org |
Всего: 5
References
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Selection of the flip-flops for partial enhanced scan techniques | Vestnik Tomskogo gosudarstvennogo universiteta. Upravlenie, vychislitelnaja tehnika i informatika – Tomsk State University Journal of Control and Computer Science. 2012. № 2(19).
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