On the use of the properties of sum code for unidirectional error detection in concurrent error detection (CED) systems of combinational circuits | Vestnik Tomskogo gosudarstvennogo universiteta. Upravlenie, vychislitelnaja tehnika i informatika – Tomsk State University Journal of Control and Computer Science. 2014. № 3(28).

On the use of the properties of sum code for unidirectional error detection in concurrent error detection (CED) systems of combinational circuits

For the CED systems organization of logical units, codes with summation of one data bits are frequent in use. Sum code data vector is assigned to operating outputs of logical unit fx), and check vector - to the outputs of reference logic block g(x). A unique correspondence is set between the signals, formed at the outputs of fx) и g(x) blocks, and this correspondence is checked by self-checking checkers. The primal problem of on-line testing organization is to provide the operating accuracy control of fx) block on a real time basis (without its disconnection from controlled object). It is also necessary to get the information about faults existence in any of CED system components at the checker outputs. When all blocks of CED system are presented independently at any given time, the occurrence of one defect only (simultaneous occurrence of faults in several blocs is unlikely) is considered acceptable. If one logical element connects within f(x) block structure with the number of its outputs, the simultaneous distortion of several output values occurs while a single fault occurs of this component, that corresponds the distortion of the number of codeword data bits. Hence, it is possible to consider sum codes properties for distortion detection in data vectors under condition of nonexistence of distortions in check vectors, that defines CED system properties for error detection in f(x) block. This article includes the analysis of classic, modified and unit-modified one data bits sum codes properties for error detection in the CED systems of combinational logic circuits. Special focus is put on sum codes capability for detection of unidirectional (one-directional) errors in codeword data bits. It has been known that classic sum code (Berger code) detects any unidirectional distortions in data vectors, that allows to make the best use of this code for combinational circuits checking, any single faults of components in it may result only to unidirectional distortions at the outputs. Modified and unit-modified sum codes can also be implemented for these purposes. This study shows that modified and unit-modified sum codes do not detect only such unidirectional distortions in codeword data vectors that has multiplicity d = M, 2M, ..., iM (iM

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Keywords

система функционального контроля, комбинационная схема, схема с монотонно независимыми выходами, код Бергера, модифицированный код Бергера, модульно модифицированные коды с суммированием, информационные разряды, необнаруживаемая ошибка, монотонная необнару-живаемая ошибка, concurrent error detection (CED), combinational circuit, circuits with unidirectionally-independent outputs, Berger code, modified Berger code, unit-modified sum codes, data bits, undetectable error, unidirectional undetectable error

Authors

Name	Organization	E-mail
Sapozhnikov Valery V.	St.Petersburg State Transport University	kat@pgups.edu
Sapozhnikov Vladimir V.	St.Petersburg State Transport University	kat@pgups.edu
Efanov Dmitry V.	St.Petersburg State Transport University	TrES-4b@yandex.ru

Всего: 3

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