Fault Effect Reasoning in Digital Systems by Topological View on Lowand High-level Decision Diagrams

To memory of my opponent Arkadi Zakrevski In order to cope with complexity of diagnostic reasoning of today's digital systems, hierarchical multi-level approaches should be used. In this paper, the possibilities of using Decision Diagrams (DD) for uniform diagnostic modeling of digital systems at different levels of abstraction are discussed. Binary Decision Diagrams (BDD) have become the state-of-the-art data structure in VLSI CAD. A special class of BDDs is presented called Structurally Synthesized BDDs (SSBDD). The idea of SSBDDs is to establish one-to-one mapping between the nodes of SSBDDs and signal paths in gate-level networks, which allows to investigate and solve with SSBDDs test and diagnosis problems directly associated with structural aspects of circuits, like fault modeling, fault collapsing, fault masking, delays, hazards. The main concept of SSBDDs lays on exploiting the topology of graphs for fault reasoning which allows to generalize the methods of test synthesis and fault analysis from the Boolean level to higher register-transfer or behavior levels of hierarchy by introducing a novel High-level DDs (HLDD).

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