Kovalev D. S. «FPGA implementation of fapkc symmetric equivalent» // 2013. №6 (Приложение) C.36-38
Kovalev D. S. «FPGA implementation of fapkc symmetric equivalent» // 2013. №6 C.36-38
Mytsko Evgeniy A., Malchukov Andrey N., Ryzhova Svetlana E. «Comparative analysis of BCH-codes decoders implementations with parameters (15, 7, 5) using FPGA» // Tomsk State University Journal of Control and Computer Science 2019. №46 C.98-107
Shekhalev Denis V. «Matrix multiplier architecture for QC-LDPC code with minimum FPGA block RAM resource using» // Tomsk State University Journal of Control and Computer Science 2021. №55 C.103-111
Ushenina Inna V. «FPGA implementation of floating-point LMS adaptive filters using high-level synthesis» // Tomsk State University Journal of Control and Computer Science 2022. №59 C.108-116
Ushenina Inna V. «FPGA implementation and comparative analysis of sigmoid calculators processing the full argument range in view of symmetry» // Tomsk State University Journal of Control and Computer Science 2025. №71 C.120-129
Ushenina Inna V. «Realization of the sigmoid activation function for neural networks on current FPGAs by the table-driven method» // Tomsk State University Journal of Control and Computer Science 2024. №69 C.124-133
, Matrosova Anzhela Yu., , Singh Virendra, Nikolaeva Ekaterina A., , , Ostanin Sergey A. «Построение тестов для неисправностей задержек робастно тестируемых путей для комбинационных схем, построенныхпокрытием BDD-графов» // 2012. №3(20) C.129-138
Trifonov D. I., Fomin D. D. «Hardware implementation of one class of 8-bit permutations» // Applied Discrete Mathematics. Supplement 2019. №12 C.134-137
Kovalev D. S., Trenkaev V.N. «ZAkrevskij's cipher FPGA implementation based on the formula-defined reconfigurable FSM» // Applied Discrete Mathematics 2014. №7 (Приложение) C.142-143
Kovalev D. S., Trenkaev V.N. «ZAkrevskij's cipher FPGA implementation based on the formula-defined reconfigurable FSM» // 2014. №7 C.142-143