Integration of the L2 concentrator into the SPD experiment at the NICA accelerator complex | Izvestiya vuzov. Fizika. 2025. № 12. DOI: 10.17223/00213411/68/12/13

Integration of the L2 concentrator into the SPD experiment at the NICA accelerator complex

The Level 2 (L2 concentrator or L2-hub) is a device of the SPD detector at the NICA accelerator complex, based on a Field-Programmable Gate Array (FPGA). The function of the L2 concentrator is to collect data from several Level 1 concentrators (L1 concentrators) via 10G Ethernet interfaces, for its sorting and transmission to a processing server via a PCIe interface. This article presents the test results of the 10G Ethernet physical interface and the throughput of the PCIe 3.0 interface. It also introduces an algorithm for an API responsible for the reception of random-size packets and a module for processing asynchronous commands on the L1 concentrator side. The obtained results confirm that the current version of the L2 concentrator meets the requirements for data reception, sorting, and transmission within the framework of the SPD experiment.

Download file

Counter downloads: 1

Keywords

FPGA, NICA, SPD, high energy physics, data acquisition algorithms, detector electronics, L2-concentrator

Authors

Name	Organization	E-mail
Berngardt Andrei E.	Tomsk State University	lemillberni@mail.ru
Erofeev Dmitry V.	Tomsk State University	dima.dzenov@gmail.com
Borshch Vladislav N.	Tomsk State University	vbochsh@mail.tsu.ru
Boikov Aleksandr V.	Joint Institute for Nuclear Research	boikov@jinr.ru

Всего: 4

References

Abazov V. et al. [SPD Collaboration] // High Energy Physics - Experiment. - 2024. - V. 1. - arXiv:2404.08317.

Бернгардт А.Е., Ерофеев Д.В., Борщь В.Н. // Изв. вузов. Физика. - 2024. - Т. 67. - № 12. - С. 85-90. - DOI: 10.17223/00213411/67/12/11.

UltraScale Architecture GTH Transceivers User Guide // Advanced Micro Devices, Inc. 2021. - 518 c. - URL: https://docs.amd.com/v/u/en-US/ug576-ultrascale-gth-transceivers (дата обращения: 17.09.2025).

UltraScale Architecture GTY Transceivers User Guide // Advanced Micro Devices, Inc. 2021. - 447 c. - URL: https://www.amd.com/content/dam/xilinx/support/documents/user_guides/ug578-ultrascale-gty-transceivers.pdf (дата обращения: 17.09.2025).

IEEE Standard for Information technology - Local and metropolitan area networks - Part 3: CSMA/CD Access Method and Physical Layer Specifications - Media Access Control (MAC) Parameters, Physical Layer, and Management Parameters for 10 Gb/s Operation // Institute of Electrical and Electronics Engineers. - 544 c. - 2002. - DOI: 10.1109/IEEESTD.2002.94131.

IBERT for UltraScale GTH Transceivers v1.4 Product Guide // Advanced Micro Devices, Inc. 2021. - 28 с. - URL: https://docs.amd.com/v/u/en-US/pg173-ibert-ultrascale-gth (дата обращения: 19.09.2025).

IBERT for UltraScale GTY Transceivers v1.3 Product Guide // Advanced Micro Devices, Inc. 2021. - 27 с. - URL: https://docs.amd.com/v/u/en-US/pg196-ibert-ultrascale-gty (дата обращения: 19.09.2025).